ASIC verification engineer (contract)
A new contracting opportunity has come live with a client of mine for an Verification Engineer working at a high-profile semiconductor firm (Fully Remote)!
Rate: TBC (Inside)
Start Date: ASAP
Contract Length: 6 Months (Probable Extension)
Skills & Experience:
We appreciate that not everyone will have all the skills/experience listed below, and would welcome applications even if you do not meet all the requirements.
Essential qualifications and skills:
- From 1 to 6 years of digital ASIC verification experience
- Practical experience and understanding of:
· System Verilog and UVM test benches
· Requirement capture, verification planning and coverage closure
· Identifying and implementing functional cover points
· System Verilog assertions
· Managing regression and debugging failures
· Experience in scripting language (Perl/Python/TCL)
- Team player with good oral and written communication skills
- Experience in creating UVM test bench from scratch
- Familiarity with C/C++
- Prior SSD design experience with any of the following storage interfaces: SAS, PCIe (NVMe preferred) or SATA
Please click here to find out more about our Key Information Documents. Please note that the documents provided contain generic information. If we are successful in finding you an assignment, you will receive a Key Information Document which will be specific to the vendor set-up you have chosen and your placement.
To find out more about Computer Futures please visit www.computerfutures.com
Computer Futures, a trading division of SThree Partnership LLP is acting as an Employment Business in relation to this vacancy | Registered office | 1st Floor, 75 King William Street, London, EC4N 7BE, United Kingdom | Partnership Number | OC387148 England and WalesApply for this Job